Fig 1. Xilinx Zedboard, with Zynq-7000 and Cortex A9 ARM processor
Fig 2. A SLAM system in action: autonomous driving
Title: FPGA-Based Simultaneous Localization and Mapping (SLAM) using High Level Synthesis
Keywords: SLAM, High level synthesis, embedded device, hardware
Promoters: prof. dr. ir. Bart Goossens (TELIN), prof. dr. ir. Erik D’Hollander (ELIS)
Problem statement:
Simultaneous Localization and Mapping (SLAM) is a computer-vision technique that allows robots and vehicles to autonomously construct or update the map of the environment. In particular, dense visual SLAM achieves a high quality dense reconstruction, which is useful for accurate real-time tracking, 3D scene extraction and modelling. Based on a high quality SLAM, it becomes easier to develop applications for automatic robot interactions with the environment and autonomous driving. Despite dense techniques being very powerful, one major issue is that due to the high computational complexity, the use of these techniques in embedded devices is challenging: recent embedded platforms combine low-power and low-cost considerations with often massive parallelism and heterogeneity, but this comes at the cost of difficulty in programmability and requires various trade-offs.
Fig 1. Xilinx Zedboard, with Zynq-7000 and Cortex A9 ARM processor | Fig 2. A SLAM system in action: autonomous driving |
Fig 3. Kinect 2 system (available at UGent-IPI) |
Goal:
The goal of this thesis is 1) to implement computationally critical parts of a SLAM algorithm on a Xilinx FPGA and 2) to investigate high level programmability, computational complexity and power considerations associated with the implementation. As a starting point, we will start from a publicly available SLAM CPU/GPU reference implementation and we will investigate how this implementation can be adapted to a Xilinx FPGA platform, using the Xilinx Vivado High Level Synthesis tools.
The research challenge consists in the architectural mapping of the software building blocks (kernels) to HLS code, the selection of the algorithmic design parameters, the streaming/memory access models and the use of appropriate high-level programming techniques, such as HLS pragmas and attributes (giving the HLS compiler hints on how the hardware synthesis should be performed). In particular, the pipelining and parallelism flexibility of the FPGA can be exploited to yield significant performance and power improvements over a CPU/GPU implementation. Hence, this thesis focuses mostly on the HLS programming aspects (i.e., in order to make the algorithm portable to embedded FPGA devices) rather than on improving the quality (accuracy) of the SLAM algorithm.
Extra info:
This master thesis is in collaboration with Xilinx, with headquarters in San José (California, USA) and in Dublin (Ireland) and Singapore. After an interview of Xilinx with the candidate, there is possibility to combine this thesis with an internship at Xilinx in either San José or Dublin (note: the internship cannot overlap with the duration of the thesis, so the internship should be best taken during the summer holidays).
Futher reading:
Richard Newcombe et al. in "KinectFusion: Real-Time Dense Surface Mapping and Tracking", ISMAR 2011, 2011 (source code https://github.com/GerhardR/kfusion)
